The present invention relates generally to the packaging of integrated circuits. More particularly, the invention relates to the formation of solder bumps for use in integrated circuit packaging.
There are a number of conventional processes for packaging integrated circuits. In many situations it is desirable to form solder bumps directly on an integrated circuit die. Typically, the solder bumps are formed on the wafer before the individual dice are cut (singulated) from the wafer. When the resulting die are mounted on a substrate or other appropriate carrier, the solder bumps may be reflowed to create electrical connections to the die. This style of electrically connecting integrated circuits is often called “flip chip” mounting. As integrated circuit devices and packaging get smaller and smaller, there are more situations where a flip chip type mounting is desirable.
In flip chip applications, there are a number of different solder bump sizes and spacings that are in commercial production. For example, one relatively standard solder bumps pitch is 500 microns. That is, the center-to-center distance between adjacent solder bumps is approximately 500 microns. Such a product may have metallization pads diameters on the order of 220-350 microns, maximum bump diameters on the order of 170-350 microns and bump heights on the order of around 200-280 microns. The next smaller relatively standard bump size contemplates the use of metallization pad diameters on the order of 150 microns, maximum bump diameters of about 170 microns and bump heights in the range of 125-130 microns. Of course, there are efforts to develop even smaller and lower profile devices.
In applications where it is desirable to minimize the total thickness of a packaged device, the height (thickness) of the solder bumps may become a limiting factor. By way of example, in some applications the die itself may be thinned to a thickness of 125 microns (or less). In such applications, even the smaller 125-130 micron bump height can take up over 50% of the total package thickness.
One problem that can be encountered when the size of the solder bumps is reduced too much is that the relative strength of the resulting joints may be too small for a particular application. For example, the described 125-130 micron high bumps on a 150 micron metallization pad may have a strength of only about 76 grams per joint. Although the existing solder bump formation techniques work well in many applications, there are continuing efforts to make thinner and stronger connections.